10-26-2012, 05:24 AM
I've never looked at the RACE source code, but I'd imagine running the two processors in parallel when stepping in the debugger wouldn't differ much from running them in parallel during normal execution. It could affect performance of course, but if accuracy is the main goal then performance goes out the window right from the start anyway.
Not sure what a good-enough granularity would be for emulating the processors though. Maybe emulate 2 TLCS-900/H clock cycles, 1 Z80 clock cycle, 2 TLCS-900/H clock cycles, and so on. I think some NES emulators let the PPU be the "reference". So they emulate the PPU for N dots, then 1 CPU clock cycle.
Not sure what a good-enough granularity would be for emulating the processors though. Maybe emulate 2 TLCS-900/H clock cycles, 1 Z80 clock cycle, 2 TLCS-900/H clock cycles, and so on. I think some NES emulators let the PPU be the "reference". So they emulate the PPU for N dots, then 1 CPU clock cycle.